1. Field of the Invention
The present invention relates to fabrication techniques use to produce semiconductor integrated circuits, and more specifically to a process used to create an area on a semiconductor wafer, to be used for a scribe line.
2. Description of Prior Art
Semiconductor devices, used for logic and memory applications, are fabricated on areas of a semiconductor, or a silicon wafer, in repeating patterns. The individual patterns, containing the desired memory and logic devices, are then separated into individual silicon chips, each chip possessing the desired logic and memory design. The number of silicon chips obtained from a single silicon wafer is a function of the size of the starting wafer, as well as the size of the individual silicon chip. The separation into individual silicon chips is usually accomplished by cutting or scribing the silicon wafer, in designated regions of the wafer, located between the repeating device patterns, via use of mechanical or laser apparatus. The regions, designated as areas to be used for scribing, are usually referred to as scribe lines, or kerf regions.
Since the separation into individual silicon chips occurs only at the completion of device fabrication process, the scribe line areas can be used for test sites or end point detection sites, needed for evaluation of the health of the ongoing semiconductor wafer. Since these test sites, or end point detection sites do not provide any additional function at the completion of the fabrication process for semiconductor devices, destruction of the test sites or end point detection sites, during the scribe process, occur without consequence. An example of the usefulness of the scribe line area, during the ongoing fabrication sequence, is the use of this area for reactive ion etching, (RIE), end point detection. When patterning specific materials used for fabrication of silicon devices, reactive ion etching techniques are employed to create a desired pattern, of a specific material, on the evolving silicon chip. First a photoresist pattern is used as a mask, followed by RIE processing which transfers the overlying photoresist pattern to the underlying, specific material. In most cases photoresist masking does not cover the scribe line area, therefore the specific material in the scribe line area, is completely removed during the RIE procedure. The end point, or the point in which the specific material has been removed, is extremely important, allowing the RIE process to be terminated, at a point in which other materials, underlying the specific material being etched, is not adversely affected. End point detection is accomplished via detection of the underlying materials or the specific material being etched. The acuity or sharpness of the endpoint is increased with increasing surface areas, thus making the large area of scribe lines, a valuable area for successful semiconductor device fabrication processing.
Although the use of scribe lines, clear of material used to fabricate the desired silicon chips, allows sharper end point detection to occur, the removal of materials from the scribe line regions, can have a adverse effect on subsequent processing steps. The topography of the area used for creation of the silicon chip, contains patterns, and regions, raised by the build up of metal and insulator layers. In contrast, the scribe line regions, where an absence of these metal and insulator layers, results in a flat, and lower topography then the adjacent regions used for the fabrication of the silicon chips. The sharp contrast in the height of these two regions can result in the masking photoresist flowing into the lower scribe line regions, at the expense of the silicon device region. This phenomena can result in insufficient photoresist coverage of areas used for silicon devices, sometimes resulting in severe photoresist thinning at the edges of silicon device regions, near the lower scribe line areas. The thinner photoresist, when used as a mask to transfer a desired pattern to an underlying material, during a RIE procedure, may not provide the necessary protection, thus resulting in unwanted, deleterious RIE etching in areas of the silicon device, not designed for patterning.
Various inventions, such as Chen, et al, in U.S. Pat. No. 5,462,636, and Yanagisawa, in U.S. Pat. No. 5,290,711, address scribe line processing, however they do not teach the process described in this invention. This invention will illustrate a scribe line design, allowing specific areas of the scribe line region to be used for end point detection, while other areas of the scribe line region will be formed with a raised topography, in a chessboard pattern, reducing the possibility of photoresist flowing away from silicon device regions. This chessboard, or alternating regions of high and low topography areas is created by specific scribe line designs.